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Architecture: Power Architecture
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IBM's open-licensing of the Power Architecture enables Synopsys to be a key contributor in expanding the breadth of Power Architecture applications into new market segments. Both IBM and Synopsys are founding members of Power.org, an open community of more than 40 companies driving collaborative innovation around the Power Architecture technology.
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The PPE is the Power Architecture based, two-way multithreaded core acting as the controller for the eight SPEs, which handle most of the computational workload. The PPE will work with conventional operating systems due to its similarity to other 64-bit PowerPC processors, while the SPEs are designed for vectorized floating point code execution. The PPE contains a 32 KiB instruction and a 32 KiB data Level 1 cache and a 512 KiB Level 2 cache. Additionally, IBM has included an AltiVec unit[22] which is fully pipelined for double precision floating point and each PPU can complete two double precision operations per clock cycle, which translates to 6.4 GFLOPS at 3.2 GHz; or eight single precision operations per clock cycle, which translates to 25.6 GFLOPS at 3.2 GHz.[23]
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Power.org is an open community of more than 40 corporations driving innovation around Power Architecture technology. Power.org provides an open ecosystem through which its members engage in collaborative innovation on Power Architecture technology. Power.org's mission is to optimize interoperability, accelerate innovation and drive increased adoption of this leading processor architecture. For more details, visit www.power.org.
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