A full discussion of Itanium micro architecture features is out of the scope of this article, but a brief summary is in order. At this point, the architecture is most notable for what most sets it apart from the legacy of IA32, a 64-bit address space. In other respects too, it's a very different beast. The compiler plays a larger performance role. The new instruction set was designed for high exposure of instruction level parallelism (ILP), and the compiler exposes this parallelism. Itanium2®-based implementations have been designed with very large and fast caches, to the benefit of server applications.